fix typo in DXC workarounds for pointers to atomic compare exchange

Author: devsh

include/nbl/builtin/hlsl/glsl_compat/core.hlsl

@@ -38,6 +38,7 @@ genIUType bitfieldInsert(genIUType const& Base, genIUType const& Insert, int Off
 // Fun fact: ideally atomics should detect the address space of `ptr` and narrow down the sync-scope properly
 // https://github.com/microsoft/DirectXShaderCompiler/issues/6508
 // Would need own meta-type/tagged-type to implement, without & and fancy operator overloads... not posssible
+// TODO: we can template on `StorageClass` instead of Ptr_T then resolve the memory scope and semantics properly
 template<typename T>
 T atomicAdd(NBL_REF_ARG(T) ptr, T value)
 {
@@ -114,9 +115,9 @@ T atomicCompSwap(NBL_REF_ARG(T) ptr, T comparator, T value)
     return spirv::atomicCompareExchange<T>(ptr, spv::ScopeDevice, spv::MemorySemanticsMaskNone, spv::MemorySemanticsMaskNone, value, comparator);
 }
 template<typename T, typename Ptr_T> // DXC Workaround
-enable_if_t<is_spirv_type_v<Ptr_T>, T> atomicCompSwap(Ptr_T ptr, T value)
+enable_if_t<is_spirv_type_v<Ptr_T>, T> atomicCompSwap(Ptr_T ptr, T comparator, T value)
 {
-    return spirv::atomicCompareExchange<T, Ptr_T>(ptr, spv::ScopeDevice, spv::MemorySemanticsMaskNone, value);
+    return spirv::atomicCompareExchange<T, Ptr_T>(ptr, spv::ScopeDevice, spv::MemorySemanticsMaskNone, spv::MemorySemanticsMaskNone, value, comparator);
 }
 
 /**