Merge branch 'master' into ray_query_geometry_creator_example

Author: keptsecret

3rdparty/CMakeLists.txt

@@ -235,6 +235,7 @@ if(_NBL_COMPILE_WITH_OPEN_EXR_)
 	set(BUILD_TESTING ${_OLD_BUILD_TESTING})
 endif()
 
+
 #gli
 option(_NBL_COMPILE_WITH_GLI_ "Build with GLI library" ON)
 if(_NBL_COMPILE_WITH_GLI_)

3rdparty/dxc/CMakeLists.txt

@@ -1,3 +1,6 @@
+option(NBL_LLVM_ENABLE_ASSERTIONS "LLVM_ENABLE_ASSERTIONS" ON)
+
+list(APPEND NBL_DXC_CMAKE_OPTIONS "-DLLVM_ENABLE_ASSERTIONS:BOOL=${NBL_LLVM_ENABLE_ASSERTIONS}")
 list(APPEND NBL_DXC_CMAKE_OPTIONS "-DHLSL_OPTIONAL_PROJS_IN_DEFAULT:BOOL=OFF")
 list(APPEND NBL_DXC_CMAKE_OPTIONS "-DHLSL_ENABLE_ANALYZE:BOOL=OFF")
 list(APPEND NBL_DXC_CMAKE_OPTIONS "-DHLSL_OFFICIAL_BUILD:BOOL=OFF")

include/nbl/builtin/hlsl/blit/common.hlsl

@@ -6,6 +6,7 @@
 
 #include <nbl/builtin/hlsl/binding_info.hlsl>
 
+#include <nbl/builtin/hlsl/glsl_compat/core.hlsl>
 namespace nbl
 {
 namespace hlsl
@@ -43,6 +44,11 @@ RWTexture3D<float4> outAs3D[ConstevalParameters::output_binding_t::Count];
 
 
 groupshared uint32_t sMem[ConstevalParameters::SharedMemoryDWORDs];
+
+[[vk::push_constant]] const nbl::hlsl::blit::Parameters pc;
+
+
+#include <nbl/builtin/hlsl/concepts.hlsl>
 /*
 struct HistogramAccessor
 {
@@ -62,19 +68,34 @@ struct SharedAccessor
 		sMem[idx] = val;
 	}
 };
-struct InCSAccessor
-{
-	float32_t4 get(float32_t3 c, uint32_t l)
-	{
-		return inCS.SampleLevel(inSamp, blit::impl::dim_to_image_properties<ConstevalParameters::BlitDimCount>::getIndexCoord<float32_t>(c, l), 0);
-	}
-};
+*/
+
 struct OutImgAccessor
 {
-	void set(int32_t3 c, uint32_t l, float32_t4 v)
+	template<typename T, int32_t Dims NBL_FUNC_REQUIRES(is_same_v<T,float>)
+	void set(const vector<uint16_t,Dims> uv, uint16_t layer, const vector<T,4> data)
 	{
-		outImg[blit::impl::dim_to_image_properties<ConstevalParameters::BlitDimCount>::getIndexCoord<int32_t>(c, l)] = v;
+		return __set_impl<Dims>(uv,layer,data);
 	}
+
+	template<int32_t Dims>
+	void __set_impl(const vector<uint16_t,Dims> uv, uint16_t layer, const float32_t4 data);
+
+	uint32_t descIx;
 };
-*/
+template<>
+void OutImgAccessor::__set_impl<1>(const uint16_t1 uv, uint16_t layer, const float32_t4 data)
+{
+	outAs1DArray[descIx][uint32_t2(uv,layer)] = data;
+}
+template<>
+void OutImgAccessor::__set_impl<2>(const uint16_t2 uv, uint16_t layer, const float32_t4 data)
+{
+	outAs2DArray[descIx][uint32_t3(uv,layer)] = data;
+}
+template<>
+void OutImgAccessor::__set_impl<3>(const uint16_t3 uv, uint16_t layer, const float32_t4 data)
+{
+	outAs3D[descIx][uv] = data;
+}
 #endif

include/nbl/builtin/hlsl/blit/compute_blit.hlsl

@@ -77,6 +77,7 @@ struct compute_blit_t
 		uint16_t localInvocationIndex)
 	{
 		const float3 halfScale = scale * float3(0.5f, 0.5f, 0.5f);
+		// bottom of the input tile
 		const uint32_t3 minOutputPixel = workGroupID * outputTexelsPerWG;
 		const float3 minOutputPixelCenterOfWG = float3(minOutputPixel)*scale + halfScale;
 		// this can be negative, in which case HW sampler takes care of wrapping for us

include/nbl/builtin/hlsl/blit/default_blit.comp.hlsl

@@ -21,21 +21,38 @@ struct KernelWeightsAccessor
 		return kernelWeights[idx];
 	}
 };
-struct InCSAccessor
+
+inCS.SampleLevel(inSamp, blit::impl::dim_to_image_properties<ConstevalParameters::BlitDimCount>::getIndexCoord<float32_t>(c, l), 0);
+*/
+struct InImgAccessor
 {
-	float32_t4 get(float32_t3 c, uint32_t l)
+	template<typename T, int32_t Dims NBL_FUNC_REQUIRES(is_same_v<T,float>)
+	vector<T,4> get(const vector<uint16_t,Dims> uv, uint16_t layer, uint16_t level)
 	{
-		return inCS.SampleLevel(inSamp, blit::impl::dim_to_image_properties<ConstevalParameters::BlitDimCount>::getIndexCoord<float32_t>(c, l), 0);
+		return __get_impl<Dims>(uv,_static_cast<float>(layer),_static_cast<float>(level));
 	}
+
+	template<int32_t Dims>
+	float32_t4 __get_impl(const vector<float32_t,Dims> uv, float layer, float level);
+
+	uint32_t descIx : 20;
+	uint32_t samplerIx : 12;
 };
-struct OutImgAccessor
+template<>
+float32_t4 InImgAccessor::__get_impl<1>(const float32_t1 uv, float layer, float level)
 {
-	void set(int32_t3 c, uint32_t l, float32_t4 v)
-	{
-		outImg[blit::impl::dim_to_image_properties<ConstevalParameters::BlitDimCount>::getIndexCoord<int32_t>(c, l)] = v;
-	}
-};
-*/
+	return inAs1DArray[descIx].SampleLevel(inSamp[samplerIx],float32_t2(uv,layer),level);
+}
+template<>
+float32_t4 InImgAccessor::__get_impl<2>(const float32_t2 uv, float layer, float level)
+{
+	return inAs2DArray[descIx].SampleLevel(inSamp[samplerIx],float32_t3(uv,layer),level);
+}
+template<>
+float32_t4 InImgAccessor::__get_impl<3>(const float32_t3 uv, float layer, float level)
+{
+	return inAs3D[descIx].SampleLevel(inSamp[samplerIx],uv,level);
+}
 
 using namespace nbl::hlsl::blit;
 
@@ -44,6 +61,26 @@ using namespace nbl::hlsl::blit;
 [numthreads(ConstevalParameters::WorkGroupSize,1,1)]
 void main()
 {
+	InImgAccessor inImgA;
+
+	OutImgAccessor outImgA;
+	outImgA.descIx = pc.outputDescIx;
+
+	const uint16_t3 wgID = _static_cast<uint16_t3>(glsl::gl_WorkGroupID());
+	const uint16_t3 baseCoord = pc.perWG.getOutputBaseCoord(wgID);
+	// TODO: If and when someone can be bothered, change the blit api to compile a pipeline per image dimension, maybe it will be faster
+	switch (pc.perWG.imageDim)
+	{
+		case 1:
+			outImgA.set(uint16_t1(baseCoord.x),wgID.z,float32_t4(1,0,1,1));
+			break;
+		case 2:
+			outImgA.set(baseCoord.xy,wgID.z,float32_t4(1,0,1,1));
+			break;
+		case 3:
+			outImgA.set(baseCoord,0xdeadu,float32_t4(1,0,1,1));
+			break;
+	}
 /*
 	blit::compute_blit_t<ConstevalParameters> blit = blit::compute_blit_t<ConstevalParameters>::create(params);
     InCSAccessor inCSA;

include/nbl/builtin/hlsl/blit/parameters.hlsl

@@ -14,7 +14,7 @@ namespace blit
 
 struct parameters_t
 {
-	float32_t3 fScale;
+	float32_t3 fScale; //
 	float32_t3 negativeSupport;
 	float32_t referenceAlpha;
 	uint32_t kernelWeightsOffsetY;
@@ -24,17 +24,15 @@ struct parameters_t
 
 	uint16_t3 inputDims;
 	uint16_t3 outputDims;
-	uint16_t3 windowDims;
+	uint16_t3 windowDims; //
 	uint16_t3 phaseCount;
-	uint16_t3 preloadRegion;
+	uint16_t3 preloadRegion; //
 	uint16_t3 iterationRegionXPrefixProducts;
 	uint16_t3 iterationRegionYPrefixProducts;
 	uint16_t3 iterationRegionZPrefixProducts;
 
-	//! Offset into the shared memory array which tells us from where the second buffer of shared memory begins
-	//! Given by max(memory_for_preload_region, memory_for_result_of_y_pass)
-	uint16_t secondScratchOffset;
-	uint16_t outputTexelsPerWGZ;
+	uint16_t secondScratchOffset; //
+	uint16_t outputTexelsPerWGZ; //
 
 	uint32_t3 getOutputTexelsPerWG()
 	{
@@ -44,36 +42,88 @@ struct parameters_t
 	}
 };
 
-struct parameters2_t
+// We do some dumb things with bitfields here like not using `vector<uint16_t,N>`, because AMD doesn't support them in push constants
+struct SPerWorkgroup
 {
-	float32_t3 fScale;
-	float32_t3 negativeSupportMinusHalf;
-	float32_t referenceAlpha;
-	uint32_t kernelWeightsOffsetY;
-	uint32_t kernelWeightsOffsetZ;
-	uint32_t inPixelCount;
-	uint32_t outPixelCount;
+	static inline SPerWorkgroup create(const float32_t3 _scale, const uint16_t _imageDim, const uint16_t3 output, const uint16_t3 preload, const uint16_t _otherPreloadOffset)
+	{
+		SPerWorkgroup retval;
+		retval.scale = _scale;
+		retval.imageDim = _imageDim;
+		retval.preloadWidth = preload[0];
+		retval.preloadHeight = preload[1];
+		retval.preloadDepth = preload[2];
+		retval.outputWidth = output[0];
+		retval.outputHeight = output[1];
+		retval.outputDepth = output[2];
+		retval.otherPreloadOffset = _otherPreloadOffset;
+		return retval;
+	}
 
-	uint16_t3 inputDims;
-	uint16_t3 outputDims;
-	uint16_t3 windowDims;
-	uint16_t3 phaseCount;
-	uint16_t3 preloadRegion;
-	uint16_t3 iterationRegionXPrefixProducts;
-	uint16_t3 iterationRegionYPrefixProducts;
-	uint16_t3 iterationRegionZPrefixProducts;
+	inline uint16_t3 getOutputBaseCoord(const uint16_t3 workgroup) NBL_CONST_MEMBER_FUNC
+	{
+		return workgroup*uint16_t3(outputWidth,outputHeight,outputDepth);
+	}
+
+	inline uint16_t3 getWorkgroupCount(const uint16_t3 outExtent, const uint16_t layersToBlit=0) NBL_CONST_MEMBER_FUNC
+	{
+		const uint16_t3 unit = uint16_t3(1,1,1);
+		uint16_t3 retval = unit;
+		retval += (outExtent-unit)/getOutputBaseCoord(unit);
+		if (layersToBlit)
+			retval[2] = layersToBlit;
+		return retval;
+	}
 
+#ifndef __HLSL_VERSION
+	explicit inline operator bool() const
+	{
+		return outputWidth && outputHeight && outputDepth && preloadWidth && preloadHeight && preloadDepth;
+	}
+#endif
+
+	// ratio of input pixels to output
+	float32_t3 scale;
+	// whether its an image1D, image2D or image3D
+	uint32_t imageDim : 2;
+	uint32_t unused0 : 14; // channel, iterationRegionPrefixSums ?
+	// 16bit in each dimension because some GPUs actually have enough shared memory for 32k pixels
+	uint32_t outputWidth	: 16;
+	uint32_t outputHeight	: 16;
+	uint32_t outputDepth	: 16;
+	uint32_t preloadWidth		: 16;
+	uint32_t preloadHeight		: 16;
+	uint32_t preloadDepth		: 16;
 	//! Offset into the shared memory array which tells us from where the second buffer of shared memory begins
 	//! Given by max(memory_for_preload_region, memory_for_result_of_y_pass)
-	uint16_t secondScratchOffset;
-	uint16_t outputTexelsPerWGZ;
+	uint32_t otherPreloadOffset	: 16;
+};
 
-	uint32_t3 getOutputTexelsPerWG()
+struct Parameters
+{
+#ifndef __HLSL_VERSION
+	explicit inline operator bool() const
 	{
-		//! `outputTexelsPerWG.xy` just happens to be in the first components of `iterationRegionsXPrefixProducts` and `iterationRegionYPrefixProducts` --this is
-		//! the result of how we choose to iterate, i.e. if, in the future, we decide to iterate differently, this needs to change.
-		return uint32_t3(iterationRegionXPrefixProducts.x, iterationRegionYPrefixProducts.x, outputTexelsPerWGZ);
+		return bool(perWG);
 	}
+#endif
+
+	SPerWorkgroup perWG; // rename to perBlitWG? 
+	//! general settings
+	uint32_t inputDescIx : 19;
+	uint32_t samplerDescIx : 11;
+	uint32_t unused0 : 2;
+	//
+	uint32_t outputDescIx : 19;
+	uint32_t channelCount : 3;
+	uint32_t unused1 : 10;
+	//
+	uint32_t unused2 : 12;
+	//! coverage settings
+	uint32_t intermAlphaDescIx : 19;
+	uint32_t coverage : 1;
+	// required to compare the atomic count of passing pixels against, so we can get original coverage
+	uint32_t inPixelCount;
 };
 
 

include/nbl/builtin/hlsl/concepts.hlsl

@@ -17,6 +17,7 @@ namespace hlsl
 namespace concepts
 {
 // common implementation juice
+#define NBL_CONCEPT_MAX_PARAM_COUNT 32
 #include <boost/preprocessor/seq/elem.hpp>
 #define NBL_IMPL_CONCEPT_FULL_TPLT(z, n, unused) BOOST_PP_SEQ_ELEM(n,NBL_CONCEPT_TPLT_PRM_KINDS) BOOST_PP_SEQ_ELEM(n,NBL_CONCEPT_TPLT_PRM_NAMES)
 #include <boost/preprocessor/repetition/enum.hpp>
@@ -34,7 +35,7 @@ namespace concepts
 
 
 //! Now diverge
-#ifndef __cpp_concepts
+#ifdef __cpp_concepts
 
 
 // to define a concept using `concept Name = SomeContexprBoolCondition<T>;`
@@ -138,10 +139,10 @@ concept matricial = is_matrix<T>::value;
 // put just after the closing `>` on the partial template specialization `template` declaration e.g. `template<typename U, typename V, typename T> NBL_PARTIAL_REQ_TOP(SomeCond<U>)
 #define NBL_PARTIAL_REQ_TOP(...)
 // put just before closing `>` on the partial template specialization Type args, e.g. `MyStruct<U,V,T NBL_PARTIAL_REQ_BOT(SomeCond<U>)>
-#define NBL_PARTIAL_REQ_BOT(...) ,std::enable_if_t<(__VA_ARGS__),void> 
+#define NBL_PARTIAL_REQ_BOT(...) ,::nbl::hlsl::enable_if_t<(__VA_ARGS__),void> 
 
 // condition, use instead of the closing `>` of a function template
-#define NBL_FUNC_REQUIRES(...) ,std::enable_if_t<(__VA_ARGS__),bool> = true>
+#define NBL_FUNC_REQUIRES(...) ,::nbl::hlsl::enable_if_t<(__VA_ARGS__),bool> = true>
 
 
 //

include/nbl/builtin/hlsl/concepts/__end.hlsl

@@ -0,0 +1,38 @@
+// Copyright (C) 2023-2024 - DevSH Graphics Programming Sp. z O.O.
+// This file is part of the "Nabla Engine".
+// For conditions of distribution and use, see copyright notice in nabla.h
+#undef NBL_CONCEPT_PARAM_31
+#undef NBL_CONCEPT_PARAM_30
+#undef NBL_CONCEPT_PARAM_29
+#undef NBL_CONCEPT_PARAM_28
+#undef NBL_CONCEPT_PARAM_27
+#undef NBL_CONCEPT_PARAM_26
+#undef NBL_CONCEPT_PARAM_25
+#undef NBL_CONCEPT_PARAM_24
+#undef NBL_CONCEPT_PARAM_23
+#undef NBL_CONCEPT_PARAM_22
+#undef NBL_CONCEPT_PARAM_21
+#undef NBL_CONCEPT_PARAM_20
+#undef NBL_CONCEPT_PARAM_19
+#undef NBL_CONCEPT_PARAM_18
+#undef NBL_CONCEPT_PARAM_17
+#undef NBL_CONCEPT_PARAM_16
+#undef NBL_CONCEPT_PARAM_15
+#undef NBL_CONCEPT_PARAM_14
+#undef NBL_CONCEPT_PARAM_13
+#undef NBL_CONCEPT_PARAM_12
+#undef NBL_CONCEPT_PARAM_11
+#undef NBL_CONCEPT_PARAM_10
+#undef NBL_CONCEPT_PARAM_9
+#undef NBL_CONCEPT_PARAM_8
+#undef NBL_CONCEPT_PARAM_7
+#undef NBL_CONCEPT_PARAM_6
+#undef NBL_CONCEPT_PARAM_5
+#undef NBL_CONCEPT_PARAM_4
+#undef NBL_CONCEPT_PARAM_3
+#undef NBL_CONCEPT_PARAM_2
+#undef NBL_CONCEPT_PARAM_1
+#undef NBL_CONCEPT_PARAM_0
+#undef NBL_CONCEPT_TPLT_PRM_NAMES
+#undef NBL_CONCEPT_TPLT_PRM_KINDS
+#undef NBL_CONCEPT_NAME