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ChiHuaLcarlescufi
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pinctrl: npcx: add nodes for Serial Port SIO clock selection
This commits adds required pinctrl node to provide the corresponding SIO clock selection for the Serial Port under the different VOSCCLK. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
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+32
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dts/arm/nuvoton/npcx/npcx4/npcx4-pinctrl.dtsi

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@@ -30,6 +30,22 @@
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dev-ctl = <0x0 6 1 0x01>;
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};
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/omit-if-no-ref/ sio_clk_sel_96m: devctl3-sio-clk_sel-96m {
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dev-ctl = <0x4 6 2 0x00>;
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};
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/omit-if-no-ref/ sio_clk_sel_100: devctl3-sio-clk_sel-100m {
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dev-ctl = <0x4 6 2 0x01>;
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};
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/omit-if-no-ref/ sio_clk_sel_120m: devctl3-sio-clk_sel-120m {
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dev-ctl = <0x4 6 2 0x02>;
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};
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/omit-if-no-ref/ sio_clk_sel_90m: devctl3-sio-clk_sel-90m {
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dev-ctl = <0x4 6 2 0x03>;
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};
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/* Prebuild nodes for peripheral device's pin-muxing and pad properties */
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/* Flash Interface Unit (FIU) */
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/omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {

dts/arm/nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi

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@@ -22,6 +22,14 @@
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dev-ctl = <0x0 6 1 0x01>;
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};
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/omit-if-no-ref/ sio_full_ck48: devctl4-sio-full-ck48 {
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dev-ctl = <0x6 3 1 0x00>;
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};
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/omit-if-no-ref/ sio_full_ck50: devctl4-sio-full-ck50 {
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dev-ctl = <0x6 3 1 0x01>;
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};
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/* Prebuild nodes for peripheral device's pin-muxing and pad properties */
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/* Flash Interface Unit (FIU) */
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/omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {

dts/arm/nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi

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@@ -23,6 +23,14 @@
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dev-ctl = <0x0 6 1 0x01>;
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};
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/omit-if-no-ref/ sio_full_ck48: devctl4-sio-full-ck48 {
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dev-ctl = <0x6 3 1 0x00>;
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};
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/omit-if-no-ref/ sio_full_ck50: devctl4-sio-full-ck50 {
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dev-ctl = <0x6 3 1 0x01>;
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};
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/* Prebuild nodes for peripheral device's pin-muxing and pad properties */
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/* Flash Interface Unit (FIU) */
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/omit-if-no-ref/ fiu_ext_io0_io1_clk_cs_gpa4_96_a2_a0: periph-fiu-ext {

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