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tmon-nordicfabiobaltieri
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drivers: udc_dwc2: Submit reset after chirp sequence
DWC USB 2.0 HS OTG Controller sets USB Reset interrupt after Reset signalling starts, but before the High-Speed Detection Handshake. This allows software to perform most of the reset handling even before the connection speed is known. The device controller indicates High-Speed Detection Handshake result is available in DSTS register by setting Enumeration Done interrupt. USB stack expects that the connection speed is known immediately after UDC_EVT_RESET is submitted. Due to this expectation, it is important to submit UDC_EVT_RESET only after Enumeration Done interrupt to prevent the USB stack from reading (and storing) actual device speed before it is known. Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
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drivers/usb/udc/udc_dwc2.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -865,13 +865,13 @@ static void udc_dwc2_isr_handler(const struct device *dev)
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sys_write32(USB_DWC2_GINTSTS_USBRST, gintsts_reg);
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dwc2_on_bus_reset(dev);
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LOG_DBG("USB Reset interrupt");
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udc_submit_event(dev, UDC_EVT_RESET, 0);
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}
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if (int_status & USB_DWC2_GINTSTS_ENUMDONE) {
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/* Clear and handle Enumeration Done interrupt. */
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sys_write32(USB_DWC2_GINTSTS_ENUMDONE, gintsts_reg);
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dwc2_handle_enumdone(dev);
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udc_submit_event(dev, UDC_EVT_RESET, 0);
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}
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if (int_status & USB_DWC2_GINTSTS_USBSUSP) {

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