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lines changed Original file line number Diff line number Diff line change 17
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.def __smuls
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.assume adl=1
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- __smuls equ 000224h
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+ __smuls equ 000224h
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+
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; (c) Copyright 2001-2008 Zilog, Inc.
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;-------------------------------------------------------------------------
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- ; Short Multiply Signed/Unsigned
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- ; Note: When multipying two n-bit values, the low-order n-bits
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- ; of the product are the same, whether or not the values
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- ; are considered signed or unsigned.
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+ ; Short Multiply Unsigned
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; Input:
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; Operand1:
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; BC : 16 bits
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; Registers Used:
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; none
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;-------------------------------------------------------------------------
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- .def __smulu,__smuls
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+ .def __smulu
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.assume adl=1
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- __smuls equ 000224h
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__smulu equ 000228h
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