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arm64: smccc: Save lr before calling __arm_smccc_sve_check()
Commit cfa7ff9 ("arm64: smccc: Support SMCCC v1.3 SVE register saving hint") added a call to __arm_smccc_sve_check() which clobbers the lr (register x30), causing __arm_smccc_hvc() to return to itself and crash. Save lr on the stack before calling __arm_smccc_sve_check(). Save the frame pointer (x29) to complete the frame record, and adjust the offsets used to access stack parameters. Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Fixes: cfa7ff9 ("arm64: smccc: Support SMCCC v1.3 SVE register saving hint") Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20210721071834.69130-1-jean-philippe@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
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arch/arm64/kernel/smccc-call.S

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,20 +32,23 @@ SYM_FUNC_END(__arm_smccc_sve_check)
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EXPORT_SYMBOL(__arm_smccc_sve_check)
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.macro SMCCC instr
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stp x29, x30, [sp, #-16]!
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mov x29, sp
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alternative_if ARM64_SVE
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bl __arm_smccc_sve_check
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alternative_else_nop_endif
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\instr #0
39-
ldr x4, [sp]
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ldr x4, [sp, #16]
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stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
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stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
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ldr x4, [sp, #8]
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ldr x4, [sp, #24]
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cbz x4, 1f /* no quirk structure */
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ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
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cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6
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b.ne 1f
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str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
48-
1: ret
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1: ldp x29, x30, [sp], #16
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ret
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.endm
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/*

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