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Merge tag 'dmaengine-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "New drivers/devices - Support for Renesas RZ/G2L dma controller - New driver for AMD PTDMA controller Updates: - Big pile of idxd updates - Updates for Altera driver, stm32-dma, dw etc" * tag 'dmaengine-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (83 commits) dmaengine: sh: fix some NULL dereferences dmaengine: sh: Fix unused initialization of pointer lmdesc MAINTAINERS: Fix AMD PTDMA DRIVER entry dmaengine: ptdma: remove PT_OFFSET to avoid redefnition dmaengine: ptdma: Add debugfs entries for PTDMA dmaengine: ptdma: register PTDMA controller as a DMA resource dmaengine: ptdma: Initial driver for the AMD PTDMA dmaengine: fsl-dpaa2-qdma: Fix spelling mistake "faile" -> "failed" dmaengine: idxd: remove interrupt disable for dev_lock dmaengine: idxd: remove interrupt disable for cmd_lock dmaengine: idxd: fix setting up priv mode for dwq dmaengine: xilinx_dma: Set DMA mask for coherent APIs dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX dmaengine: sh: Add DMAC driver for RZ/G2L SoC dmaengine: Extend the dma_slave_width for 128 bytes dt-bindings: dma: Document RZ/G2L bindings dmaengine: ioat: depends on !UML dmaengine: idxd: set descriptor allocation size to threshold for swq dmaengine: idxd: make submit failure path consistent on desc freeing dmaengine: idxd: remove interrupt flag for completion list spinlock ...
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‎Documentation/ABI/stable/sysfs-driver-dma-idxd

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Original file line numberDiff line numberDiff line change
@@ -128,6 +128,8 @@ Date: Aug 28, 2020
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KernelVersion: 5.10.0
129129
Contact: dmaengine@vger.kernel.org
130130
Description: The last executed device administrative command's status/error.
131+
Also last configuration error overloaded.
132+
Writing to it will clear the status.
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What: /sys/bus/dsa/devices/wq<m>.<n>/block_on_fault
133135
Date: Oct 27, 2020
@@ -211,6 +213,13 @@ Contact: dmaengine@vger.kernel.org
211213
Description: Indicate whether ATS disable is turned on for the workqueue.
212214
0 indicates ATS is on, and 1 indicates ATS is off for the workqueue.
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216+
What: /sys/bus/dsa/devices/wq<m>.<n>/occupancy
217+
Date May 25, 2021
218+
KernelVersion: 5.14.0
219+
Contact: dmaengine@vger.kernel.org
220+
Description: Show the current number of entries in this WQ if WQ Occupancy
221+
Support bit WQ capabilities is 1.
222+
214223
What: /sys/bus/dsa/devices/engine<m>.<n>/group_id
215224
Date: Oct 25, 2019
216225
KernelVersion: 5.6.0

‎Documentation/admin-guide/kernel-parameters.txt

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Original file line numberDiff line numberDiff line change
@@ -1758,6 +1758,11 @@
17581758
support for the idxd driver. By default it is set to
17591759
true (1).
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1761+
idxd.tc_override= [HW]
1762+
Format: <bool>
1763+
Allow override of default traffic class configuration
1764+
for the device. By default it is set to false (0).
1765+
17611766
ieee754= [MIPS] Select IEEE Std 754 conformance mode
17621767
Format: { strict | legacy | 2008 | relaxed }
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Default: strict

‎Documentation/devicetree/bindings/dma/altr,msgdma.yaml

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Original file line numberDiff line numberDiff line change
@@ -24,13 +24,15 @@ properties:
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items:
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- description: Control and Status Register Slave Port
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- description: Descriptor Slave Port
27-
- description: Response Slave Port
27+
- description: Response Slave Port (Optional)
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minItems: 2
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reg-names:
3031
items:
3132
- const: csr
3233
- const: desc
3334
- const: resp
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minItems: 2
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interrupts:
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maxItems: 1

‎Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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@@ -0,0 +1,130 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
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7+
title: Renesas RZ/G2L DMA Controller
8+
9+
maintainers:
10+
- Biju Das <biju.das.jz@bp.renesas.com>
11+
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allOf:
13+
- $ref: "dma-controller.yaml#"
14+
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properties:
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compatible:
17+
items:
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- enum:
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- renesas,r9a07g044-dmac # RZ/G2{L,LC}
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- const: renesas,rz-dmac
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reg:
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items:
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- description: Control and channel register block
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- description: DMA extended resource selector block
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interrupts:
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maxItems: 17
29+
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interrupt-names:
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items:
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- const: error
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- const: ch0
34+
- const: ch1
35+
- const: ch2
36+
- const: ch3
37+
- const: ch4
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- const: ch5
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- const: ch6
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- const: ch7
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- const: ch8
42+
- const: ch9
43+
- const: ch10
44+
- const: ch11
45+
- const: ch12
46+
- const: ch13
47+
- const: ch14
48+
- const: ch15
49+
50+
clocks:
51+
items:
52+
- description: DMA main clock
53+
- description: DMA register access clock
54+
55+
'#dma-cells':
56+
const: 1
57+
description:
58+
The cell specifies the encoded MID/RID values of the DMAC port
59+
connected to the DMA client and the slave channel configuration
60+
parameters.
61+
bits[0:9] - Specifies MID/RID value
62+
bit[10] - Specifies DMA request high enable (HIEN)
63+
bit[11] - Specifies DMA request detection type (LVL)
64+
bits[12:14] - Specifies DMAACK output mode (AM)
65+
bit[15] - Specifies Transfer Mode (TM)
66+
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dma-channels:
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const: 16
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70+
power-domains:
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maxItems: 1
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73+
resets:
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items:
75+
- description: Reset for DMA ARESETN reset terminal
76+
- description: Reset for DMA RST_ASYNC reset terminal
77+
78+
required:
79+
- compatible
80+
- reg
81+
- interrupts
82+
- interrupt-names
83+
- clocks
84+
- '#dma-cells'
85+
- dma-channels
86+
- power-domains
87+
- resets
88+
89+
additionalProperties: false
90+
91+
examples:
92+
- |
93+
#include <dt-bindings/interrupt-controller/arm-gic.h>
94+
#include <dt-bindings/clock/r9a07g044-cpg.h>
95+
96+
dmac: dma-controller@11820000 {
97+
compatible = "renesas,r9a07g044-dmac",
98+
"renesas,rz-dmac";
99+
reg = <0x11820000 0x10000>,
100+
<0x11830000 0x10000>;
101+
interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
102+
<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
103+
<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
104+
<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
105+
<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
109+
<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
110+
<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
114+
<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
116+
<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
118+
interrupt-names = "error",
119+
"ch0", "ch1", "ch2", "ch3",
120+
"ch4", "ch5", "ch6", "ch7",
121+
"ch8", "ch9", "ch10", "ch11",
122+
"ch12", "ch13", "ch14", "ch15";
123+
clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
124+
<&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
125+
power-domains = <&cpg>;
126+
resets = <&cpg R9A07G044_DMAC_ARESETN>,
127+
<&cpg R9A07G044_DMAC_RST_ASYNC>;
128+
#dma-cells = <1>;
129+
dma-channels = <16>;
130+
};

‎Documentation/devicetree/bindings/dma/st,stm32-dma.yaml

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@@ -40,6 +40,13 @@ description: |
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0x0: FIFO mode with threshold selectable with bit 0-1
4141
0x1: Direct mode: each DMA request immediately initiates a transfer
4242
from/to the memory, FIFO is bypassed.
43+
-bit 4: alternative DMA request/acknowledge protocol
44+
0x0: Use standard DMA ACK management, where ACK signal is maintained
45+
up to the removal of request and transfer completion
46+
0x1: Use alternative DMA ACK management, where ACK de-assertion does
47+
not wait for the de-assertion of the REQuest, ACK is only managed
48+
by transfer completion. This must only be used on channels
49+
managing transfers for STM32 USART/UART.
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maintainers:

‎MAINTAINERS

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Original file line numberDiff line numberDiff line change
@@ -985,6 +985,12 @@ S: Supported
985985
T: git https://gitlab.freedesktop.org/agd5f/linux.git
986986
F: drivers/gpu/drm/amd/pm/powerplay/
987987

988+
AMD PTDMA DRIVER
989+
M: Sanjay R Mehta <sanju.mehta@amd.com>
990+
L: dmaengine@vger.kernel.org
991+
S: Maintained
992+
F: drivers/dma/ptdma/
993+
988994
AMD SEATTLE DEVICE TREE SUPPORT
989995
M: Brijesh Singh <brijeshkumar.singh@amd.com>
990996
M: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

‎drivers/dma/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -277,10 +277,15 @@ config INTEL_IDMA64
277277
Enable DMA support for Intel Low Power Subsystem such as found on
278278
Intel Skylake PCH.
279279

280+
config INTEL_IDXD_BUS
281+
tristate
282+
default INTEL_IDXD
283+
280284
config INTEL_IDXD
281285
tristate "Intel Data Accelerators support"
282-
depends on PCI && X86_64
286+
depends on PCI && X86_64 && !UML
283287
depends on PCI_MSI
288+
depends on PCI_PASID
284289
depends on SBITMAP
285290
select DMA_ENGINE
286291
help
@@ -291,6 +296,23 @@ config INTEL_IDXD
291296

292297
If unsure, say N.
293298

299+
config INTEL_IDXD_COMPAT
300+
bool "Legacy behavior for idxd driver"
301+
depends on PCI && X86_64
302+
select INTEL_IDXD_BUS
303+
help
304+
Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
305+
The old behavior performed driver bind/unbind for device and wq
306+
devices all under the dsa driver. The compat driver will emulate
307+
the legacy behavior in order to allow existing support apps (i.e.
308+
accel-config) to continue function. It is expected that accel-config
309+
v3.2 and earlier will need the compat mode. A distro with later
310+
accel-config version can disable this compat config.
311+
312+
Say Y if you have old applications that require such behavior.
313+
314+
If unsure, say N.
315+
294316
# Config symbol that collects all the dependencies that's necessary to
295317
# support shared virtual memory for the devices supported by idxd.
296318
config INTEL_IDXD_SVM
@@ -315,7 +337,7 @@ config INTEL_IDXD_PERFMON
315337

316338
config INTEL_IOATDMA
317339
tristate "Intel I/OAT DMA support"
318-
depends on PCI && X86_64
340+
depends on PCI && X86_64 && !UML
319341
select DMA_ENGINE
320342
select DMA_ENGINE_RAID
321343
select DCA
@@ -716,6 +738,8 @@ source "drivers/dma/bestcomm/Kconfig"
716738

717739
source "drivers/dma/mediatek/Kconfig"
718740

741+
source "drivers/dma/ptdma/Kconfig"
742+
719743
source "drivers/dma/qcom/Kconfig"
720744

721745
source "drivers/dma/dw/Kconfig"

‎drivers/dma/Makefile

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ obj-$(CONFIG_DMATEST) += dmatest.o
1616
obj-$(CONFIG_ALTERA_MSGDMA) += altera-msgdma.o
1717
obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
1818
obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
19+
obj-$(CONFIG_AMD_PTDMA) += ptdma/
1920
obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
2021
obj-$(CONFIG_AT_XDMAC) += at_xdmac.o
2122
obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o
@@ -41,7 +42,7 @@ obj-$(CONFIG_IMX_DMA) += imx-dma.o
4142
obj-$(CONFIG_IMX_SDMA) += imx-sdma.o
4243
obj-$(CONFIG_INTEL_IDMA64) += idma64.o
4344
obj-$(CONFIG_INTEL_IOATDMA) += ioat/
44-
obj-$(CONFIG_INTEL_IDXD) += idxd/
45+
obj-y += idxd/
4546
obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
4647
obj-$(CONFIG_K3_DMA) += k3dma.o
4748
obj-$(CONFIG_LPC18XX_DMAMUX) += lpc18xx-dmamux.o

‎drivers/dma/acpi-dma.c

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -70,10 +70,22 @@ static int acpi_dma_parse_resource_group(const struct acpi_csrt_group *grp,
7070

7171
si = (const struct acpi_csrt_shared_info *)&grp[1];
7272

73-
/* Match device by MMIO and IRQ */
73+
/* Match device by MMIO */
7474
if (si->mmio_base_low != lower_32_bits(mem) ||
75-
si->mmio_base_high != upper_32_bits(mem) ||
76-
si->gsi_interrupt != irq)
75+
si->mmio_base_high != upper_32_bits(mem))
76+
return 0;
77+
78+
/*
79+
* acpi_gsi_to_irq() can't be used because some platforms do not save
80+
* registered IRQs in the MP table. Instead we just try to register
81+
* the GSI, which is the core part of the above mentioned function.
82+
*/
83+
ret = acpi_register_gsi(NULL, si->gsi_interrupt, si->interrupt_mode, si->interrupt_polarity);
84+
if (ret < 0)
85+
return 0;
86+
87+
/* Match device by Linux vIRQ */
88+
if (ret != irq)
7789
return 0;
7890

7991
dev_dbg(&adev->dev, "matches with %.4s%04X (rev %u)\n",

‎drivers/dma/altera-msgdma.c

Lines changed: 26 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -691,10 +691,14 @@ static void msgdma_tasklet(struct tasklet_struct *t)
691691

692692
spin_lock_irqsave(&mdev->lock, flags);
693693

694-
/* Read number of responses that are available */
695-
count = ioread32(mdev->csr + MSGDMA_CSR_RESP_FILL_LEVEL);
696-
dev_dbg(mdev->dev, "%s (%d): response count=%d\n",
697-
__func__, __LINE__, count);
694+
if (mdev->resp) {
695+
/* Read number of responses that are available */
696+
count = ioread32(mdev->csr + MSGDMA_CSR_RESP_FILL_LEVEL);
697+
dev_dbg(mdev->dev, "%s (%d): response count=%d\n",
698+
__func__, __LINE__, count);
699+
} else {
700+
count = 1;
701+
}
698702

699703
while (count--) {
700704
/*
@@ -703,8 +707,12 @@ static void msgdma_tasklet(struct tasklet_struct *t)
703707
* have any real values, like transferred bytes or error
704708
* bits. So we need to just drop these values.
705709
*/
706-
size = ioread32(mdev->resp + MSGDMA_RESP_BYTES_TRANSFERRED);
707-
status = ioread32(mdev->resp + MSGDMA_RESP_STATUS);
710+
if (mdev->resp) {
711+
size = ioread32(mdev->resp +
712+
MSGDMA_RESP_BYTES_TRANSFERRED);
713+
status = ioread32(mdev->resp +
714+
MSGDMA_RESP_STATUS);
715+
}
708716

709717
msgdma_complete_descriptor(mdev);
710718
msgdma_chan_desc_cleanup(mdev);
@@ -757,14 +765,21 @@ static void msgdma_dev_remove(struct msgdma_device *mdev)
757765
}
758766

759767
static int request_and_map(struct platform_device *pdev, const char *name,
760-
struct resource **res, void __iomem **ptr)
768+
struct resource **res, void __iomem **ptr,
769+
bool optional)
761770
{
762771
struct resource *region;
763772
struct device *device = &pdev->dev;
764773

765774
*res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
766775
if (*res == NULL) {
767-
dev_err(device, "resource %s not defined\n", name);
776+
if (optional) {
777+
*ptr = NULL;
778+
dev_info(device, "optional resource %s not defined\n",
779+
name);
780+
return 0;
781+
}
782+
dev_err(device, "mandatory resource %s not defined\n", name);
768783
return -ENODEV;
769784
}
770785

@@ -805,17 +820,17 @@ static int msgdma_probe(struct platform_device *pdev)
805820
mdev->dev = &pdev->dev;
806821

807822
/* Map CSR space */
808-
ret = request_and_map(pdev, "csr", &dma_res, &mdev->csr);
823+
ret = request_and_map(pdev, "csr", &dma_res, &mdev->csr, false);
809824
if (ret)
810825
return ret;
811826

812827
/* Map (extended) descriptor space */
813-
ret = request_and_map(pdev, "desc", &dma_res, &mdev->desc);
828+
ret = request_and_map(pdev, "desc", &dma_res, &mdev->desc, false);
814829
if (ret)
815830
return ret;
816831

817832
/* Map response space */
818-
ret = request_and_map(pdev, "resp", &dma_res, &mdev->resp);
833+
ret = request_and_map(pdev, "resp", &dma_res, &mdev->resp, true);
819834
if (ret)
820835
return ret;
821836

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