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Replace riscv32-elf with riscv64-elf
GNAT FSF compiler only comes in riscv64-elf version that supports both 32 and 64 RISC-V.
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10 files changed

+14
-14
lines changed

10 files changed

+14
-14
lines changed

boards/HiFive1/hifive1_zfp.gpr

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ library project HiFive1_ZFP is
88
Build_Checks : Build_Checks_Type := external ("ADL_BUILD_CHECKS", "Disabled");
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1010
-- Target architecture
11-
for Target use "riscv32-elf";
11+
for Target use "riscv64-elf";
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Target := Project'Target;
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-- Callgraph info is not available on all architectures

boards/HiFive1_rev_B/hifive1_rev_b_zfp.gpr

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,13 @@ library project HiFive1_rev_B_ZFP is
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Build_Checks : Build_Checks_Type := external ("ADL_BUILD_CHECKS", "Disabled");
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-- Target architecture
11-
for Target use "riscv32-elf";
11+
for Target use "riscv64-elf";
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Target := Project'Target;
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-- Callgraph info is not available on all architectures
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Callgraph_Switch := ();
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case Target is
17-
when "riscv32-unknown-elf" => null;
17+
when "riscv64-elf" => null;
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when others => Callgraph_Switch := ("-fcallgraph-info=su");
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end case;
2020

boards/Unleashed/unleashed_full.gpr

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,13 @@ library project Unleashed_Full is
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Build_Checks : Build_Checks_Type := external ("ADL_BUILD_CHECKS", "Disabled");
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-- Target architecture
11-
for Target use "riscv32-elf";
11+
for Target use "riscv64-elf";
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Target := Project'Target;
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-- Callgraph info is not available on all architectures
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Callgraph_Switch := ();
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case Target is
17-
when "riscv32-unknown-elf" => null;
17+
when "riscv64-elf" => null;
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when others => Callgraph_Switch := ("-fcallgraph-info=su");
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end case;
2020

boards/Unleashed/unleashed_sfp.gpr

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,13 @@ library project Unleashed_SFP is
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Build_Checks : Build_Checks_Type := external ("ADL_BUILD_CHECKS", "Disabled");
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-- Target architecture
11-
for Target use "riscv32-elf";
11+
for Target use "riscv64-elf";
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Target := Project'Target;
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-- Callgraph info is not available on all architectures
1515
Callgraph_Switch := ();
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case Target is
17-
when "riscv32-unknown-elf" => null;
17+
when "riscv64-elf" => null;
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when others => Callgraph_Switch := ("-fcallgraph-info=su");
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end case;
2020

boards/Unleashed/unleashed_zfp.gpr

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,13 @@ library project Unleashed_ZFP is
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Build_Checks : Build_Checks_Type := external ("ADL_BUILD_CHECKS", "Disabled");
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1010
-- Target architecture
11-
for Target use "riscv32-elf";
11+
for Target use "riscv64-elf";
1212
Target := Project'Target;
1313

1414
-- Callgraph info is not available on all architectures
1515
Callgraph_Switch := ();
1616
case Target is
17-
when "riscv32-unknown-elf" => null;
17+
when "riscv64-elf" => null;
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when others => Callgraph_Switch := ("-fcallgraph-info=su");
1919
end case;
2020

examples/HiFive1/hifive1_example.gpr

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ with "../../boards/HiFive1/hifive1_zfp.gpr";
33
project HiFive1_Example is
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55
for Runtime ("ada") use HiFive1_ZFP'Runtime ("Ada");
6-
for Target use "riscv32-elf";
6+
for Target use "riscv64-elf";
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for Main use ("main.adb");
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for Languages use ("Ada");
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for Source_Dirs use ("src");

examples/HiFive1_rev_B/README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ This will create a folder named `obj` in the same directory with the elf-formate
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binary plus some auxiliary files. Inside this folder run the following command
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to create the `hex` file:
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25-
`$ riscv32-elf-objcopy -O ihex main main.hex`
25+
`$ riscv64-elf-objcopy -O ihex main main.hex`
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This new revision of the HiFive board allows the `hex` file to be uploaded
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through the USB connection that should appear in your file manager. Just copy

examples/HiFive1_rev_B/hifive1_rev_B_example.gpr

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@ with "../../boards/HiFive1_rev_B/hifive1_rev_b_zfp.gpr";
33
project HiFive1_rev_B_Example is
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55
for Runtime ("ada") use HiFive1_rev_B_ZFP'Runtime ("Ada");
6-
for Target use "riscv32-elf";
6+
for Target use "riscv64-elf";
77
for Main use ("main.adb");
88
for Languages use ("Ada");
99
for Source_Dirs use ("src");

scripts/build_all_examples.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,7 @@ def gprbuild(project_file, debug=False):
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]
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# Check if RISC-V32 compiler is available
176-
if distutils.spawn.find_executable("riscv32-elf-gnatls"):
176+
if distutils.spawn.find_executable("riscv64-elf-gnatls"):
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178178
# Add RISC-V32 projects
179179
projects += ["/examples/HiFive1/hifive1_example.gpr"]

scripts/config/__init__.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ def target(self):
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if arch == "ARM":
6868
target = "arm-eabi"
6969
elif arch == "RISC-V":
70-
target = "riscv32-elf"
70+
target = "riscv64-elf"
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7272
return target
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