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;----------------------------------------------------------------------------;
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; GLaTICK (Generational Logic and Time Interval Cadence Keeper)
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;----------------------------------------------------------------------------;
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- ; RTC Support for DS-1216x/DS1315 "SmartWatch".
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+ ; RTC Support for DS-1216x/DS1315 "SmartWatch" ROM .
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;
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; TODO:
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; - RAM
@@ -27,20 +27,27 @@ TEST_MMDD EQU 0814H ; month / day
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TEST_YY EQU 23H ; year
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TEST_HHMM EQU 1009H ; hour / minute
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TEST_SS EQU 33H ; seconds
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- TEST_READ EQU 10H
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+ TEST_READ EQU 10H ; a valid register byte (2010-10-10 10:10:10)
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ENDIF
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;----------------------------------------------------------------------------;
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- ; F000 :0000 - SmartWatch RAM access segment/ offsets
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+ ; F600 :0000 - SmartWatch ROM access segment and address offsets
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;----------------------------------------------------------------------------;
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+ ; The SmartWatch uses the ROM's address lines for data transfer in and out.
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+ ;
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; Scan for clock begins at the below segment, and at every 8K segment
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; boundary until 0000h.
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;----------------------------------------------------------------------------;
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_SW_ACC SEGMENT AT 0F600H ; set the start segment for scan
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- ORG 0010B
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- SW_WR0 DB ? ; 010 Set Read/Write=Write, D0=00H
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- SW_WR1 DB ? ; 011 Set Read/Write=Write, D0=01H
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- SR_RD DB ? ; 100 Set Read/Write=Read, D0=XX
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+ ;_SW_ACC SEGMENT AT 0C000H ; set the start segment for scan
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+
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+ ;----------------------------------------------------------------------------;
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+ ; Non-interleaved ROM access offsets
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+ ;
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+ ORG 0010B
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+ SW_WR0 DB ? ; 010b: A2=write, A0=0
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+ SW_WR1 DB ? ; 011b: A2=write, A0=1
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+ SR_RD DB ? ; 100b: A2=read, DQ0=in
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_SW_ACC ENDS
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;----------------------------------------------------------------------------;
@@ -56,7 +63,6 @@ SW_REG_DATE DB ? ; 05h: day of month (01-31)
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SW_REG_MON DB ? ; 06h: month (01-12)
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SW_REG_YEAR DB ? ; 07h: year (00-99)
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SW_REG ENDS
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- SW_DATA_SZ EQU SIZE SW_REG ; 8 bytes size
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;----------------------------------------------------------------------------;
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; SW 00h: centi-sec (00-99)
@@ -139,6 +145,9 @@ SW_MON RECORD MNX1:3, MON10:1, MON01:4
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;----------------------------------------------------------------------------;
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SW_YEAR RECORD YR10: 4 , YR01: 4
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+ SW_DATA_SZ EQU SIZE SW_REG ; 8 byte buffer size
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+ SW_DATA_SZB EQU SW_DATA_SZ * WIDTH SW_CS ; 64 bit buffer size
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+
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INCLUDE GLALIB. INC
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INCLUDE MACROS. INC
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@@ -573,7 +582,7 @@ SW_READ_BIT:
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DEC CH ; decrement bit counter
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JNZ SW_READ_BIT ; loop until end of byte
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IF TEST_MODE EQ 1
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- MOV AL , TEST_READ ; test data byte read
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+ MOV AH , TEST_READ ; test data byte read
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ENDIF
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MOV [ SI ], AH ; save byte to data buffer
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INC SI ; next output byte in buffer
@@ -641,7 +650,17 @@ SW_WRITE_ALL PROC
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; Clobbers: AX, CX, SI
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;----------------------------------------------------------------------------;
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SW_ACCESS PROC
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- MOV AH , ES :SR_RD ; reset comparison register pointer
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+
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+ ;----------------------------------------------------------------------------;
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+ ; When power is cycled, 64 reads should be executed prior to any writes to
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+ ; ensure that the RTC registers are not written.
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+ ;
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+ MOV CX , SW_DATA_SZB + 1
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+ SW_ACCESS_CLEAR:
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+ MOV AL , ES :SR_RD ; read next bit from RTC
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+ LOOP SW_ACCESS_CLEAR
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+ IO_DELAY_SHORT ; short delay before continuing
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+
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LEA SI , _RAM_ACC ; RAM access data pattern
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; fall through to write
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@@ -765,11 +784,12 @@ DOW PROC
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; (3 = March, 4 = April, 5 = May, ..., 14 = February)
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;
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SUB AL , 2 ; compare and perform (m-2) operation below
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+ ; (1 = Mar, ..., 10 = Dec)
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JA DOW_1 ; jump if Mar-Dec
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ADD AL , 12 ; 11 = Jan, 12 = Feb
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;----------------------------------------------------------------------------;
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- ; decrement year in BCD
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+ ; if Jan or Feb, decrement year ( in BCD)
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;
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XCHG AX , CX ; AX = year (BCD)
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SUB AL , 1 ; decrement low digits
@@ -812,11 +832,11 @@ DOW_1:
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;
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MOV AL , CH ; J century
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CALL BCD_TO_BYTE
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- PUSH AX ; save byte century
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+ MOV CX , AX ; save byte century
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SHR AX , 1 ; J / 4
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SHR AX , 1
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ADD BX , AX ; add to running sum
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- POP AX
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+ XCHG AX , CX ; restore byte century
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;----------------------------------------------------------------------------;
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; + 5*J
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